1. Technical Field
The present invention relates to fault tolerance of a cache memory and more particularly, to fault tolerance of a cache memory which can recovers or reports an error detected in the cache memory.
2. Description of the Related Art
There is a cache memory (hereinafter, referred to as ‘cache’) between a processor and a main memory. The cache is a memory capable for faster response compared to the main memory by temporally storing instructions and data requested by a processor along with addresses.
When any error is occurred to a cache due to an external factor, a processor may read a wrong instruction from the cache and thus cannot interpret the instruction or performs an undesired operation. The processor may also read wrong data and thus undesired result may be provided.
Therefore, when any error is occurred to a cache, it is needed to recover or report such an error to the outside to be recovered properly.